1. Field of the Invention
The invention relates to an SRAM memory cell, a memory cell arrangement and a method for fabricating a memory cell arrangement.
2. Description of the Related Prior Art
Conventional silicon microelectronics usually uses horizontally formed MOSFETs (“Metal Oxide Semiconductor Field Effect Transistors”), in which the surface of a substrate on or in which the MOSFET is formed is oriented parallel to a gate oxide layer arranged thereon and parallel to a gate electrode arranged on the gate oxide layer. In order to achieve further miniaturization in silicon microtechnology, efforts are being undertaken to form a vertically layered transistor, i.e. a transistor in which the gate oxide layer is arranged essentially perpendicular to the surface of the substrate on or in which the vertical transistor is formed.